- Ben Eater 8-Bit Architecture
- Dear ImGui Docking Interface
- Cycle-Accurate Bus Arbitration
- OpenGL 3.3 & GLFW Desktop App
COMPUTER ARCHITECTURE / IMGUI TOOLS
Real-Time Visual Microarchitecture & Stepping Debugger in Dear ImGui
CPUdockingimgui brings the classic Ben Eater breadboard computer to life in an interactive, modular desktop environment. Built in modern C++ with Dear ImGui's docking branch and OpenGL, the emulator provides real-time visibility into internal bus contention, microinstruction control lines, register latches, and ALU arithmetic states.
Modular discrete microarchitecture
Accurately models discrete breadboard ICs as modular C++ subsystems: master clock generator, 4-bit program counter, Memory Address Register (MAR), 16-byte RAM matrix, Instruction Register (IREG), dual 8-bit accumulators (A/B), and dedicated display output register (OUTREG).
Dockable Dear ImGui workspace
Leverages Dear ImGui's multi-viewport docking architecture. Engineers can arrange custom debugging panels across multiple monitors—placing register hex inspectors, live bus monitors, RAM editors, and microcode decoders wherever needed.
Tri-state bus arbitration & step debugger
Models active-low tri-state buffer enable and load control lines (EO, AI, BI, MI, RO, etc.). Developers can single-step clock ticks, run at variable frequencies from 1 Hz to 100 kHz, or set breakpoints to observe ALU carry and zero flags in action.
Arithmetic logic unit & instruction decoder
Implements 4-bit addition, subtraction with 2's complement, and condition flag setting. The microcode state machine decodes SAP-1 instruction sets (LDA, ADD, SUB, STA, LDI, JMP, JC, JZ, OUT, HLT) with cycle-by-cycle control word illumination.
Simulator Specifications & Subsystems
- Architecture Base
- SAP-1 (Simple-As-Possible) / Ben Eater 8-bit Breadboard Computer
- Language / Toolchain
- C++14 · Microsoft Visual Studio 2019 / 2022 · C++ Standard Library
- Graphics & Windowing
- GLFW 3.3 · OpenGL 3.3 Core Profile · Modern shader pipeline
- GUI Framework
- Dear ImGui (Docking branch) with customizable layout serialization
- Memory System
- 16-byte RAM matrix with live memory hex viewer and runtime editing
- Registers & ALU
- Accumulator A, Register B, Instruction Reg, MAR, 4-bit ALU with flags
Educational & Hardware Engineering Significance
Bridges the gap between theoretical microprogramming and physical TTL logic ICs, offering an indispensable visual testbench for computer architecture education and low-level debugging.